1. Field of the Invention
The present invention relates generally to a method of micromachining a semiconductor and, more particularly, to an anisotropic etching method of a silicon wafer, which is capable of forming gap portions such as a narrow gap portion and a comparatively wide gap portion disposed in an internal electrode portion of, for example, an acceleration detector, without any degradation of an element construction by means of a penetration etching.
2. Description of Related Art
In recent years, the technical development of an acceleration detector utilizing bulk micromachining and surface micromachining of semiconductors has been being made actively. The reason is that the significant increasing of demand for acceleration detectors used in an altitude control, a brake control and an air bag system can be prospected given the increased use of semi-conductors in motor vehicles, and given the mass production of downsized and low-cost detectors is becoming possible substrate. In addition, since an acceleration detector of the capacitive detection type has such advantages that the detector construction is comparatively simple, the temperature dependency is small and the self-diagnostics of the detector can be readily carried out by using an electrostatic power, various research and development efforts for that detector type are taking place. Particularly, there is an recent emphasis on research of the monolithic acceleration detector which has both a detector structure fabricated by the surface micromachining and a detection circuit IC that is integrally formed. The inventor of the present invention intended to obtain a trial construction of the acceleration detector 1 of the capacitive type having the internal electrode completely hermetically sealed by the three-layer structure comprising a glass layer 10, a silicon wafer layer 20 and a glass layer 30 as shown in FIG. 2 by making use of the bulk micromachining technology having a comparatively well completed technology and a good characteristic of the silicon wafer (110) for the anisotropic etching. That is, the silicon wafer layer 20 comprises a movable electrode 21, stationary electrodes 22, 23 disposed on the opposite sides of the movable electrode 21, a joist 24 for supporting the movable electrode 21, anchoring portions 25, and an auxiliary supporting portion 26 (FIG. 1) for use in obtaining the sealing structure of the element, and for detecting a displacement of the movable electrode 21 in the direction of the arrow through a signal detecting circuit (not illustrated) so as to obtain a voltage output proportional to the displacement of the movable electrode. In the trial construction of this detector, the anisotropic wet etching by a solution of KOH is applied to the silicon wafer face (110) for forming the internal electrode. Thereupon, since an etching rate for faces (111) providing wall surfaces of an etched groove perpendicular to the face (110) is smaller, namely about 1/100 or less, in comparison to that of the face (110), when using this characteristic, it becomes possible to comparatively readily form a narrow gap electrode with a high aspect having the opposed faces (111). One such method is proposed using anisotropic etching as disclosed in Japanese Patent Publication (unexamined) No. 53-3081 and Japanese Patent Publication (unexamined) No. 7-201806.
In the acceleration detector 1, however, as shown in FIG. 3, when the narrow gap portion GS and the wider opening portion GL are formed in the face (110) of the silicon wafer by means of anisotropic etching method, since the etching rate in the direction of the face (111) is usually lower than the etching rate in the directions of other faces, there will appear the face (110) which is the bottom surface of the narrow gap portion GS, the wall face (111) perpendicular to the face (110) and inclined surfaces having an angle of 35.5 degree with respect to the face (110). Since a high index surface, which is the face (331), could be formed depending on the concentration of the etching solution of KOH, it was found that this etching rate difference would interfere with the penetration etching of the wafer and forming the groove of the narrow gap portion GS.